Output Devices : Monitor, Printer, Disk Drive, Floppy Drive, CDRW-Rom, Speakers
I/O devices can be characterized by:
- Behaviour: input, output, storage
- Partner: human or machine
- Data rate: bytes/sec, transfers/sec
- Interface to CPU and Memory
- Interface to one or more peripherals
Functions of I/O Module:
- Control and Timing
- CPU Communicating
- Device Communication
- Data Buffering
- Error Detection
• Coordination of traffic between internal resources and external devices
• Example transaction:
— Processor interrogates status of I/O module
— Module returns device status
— Device indicates ready to transmit; processor requests data transfer by means of a command to
the module
— I/O module obtains a byte of data from the device
— Data are transferred to the processor
– Typically requires one or more bus arbitrations
2. CPU Communicating
- Command Decoding : read/write seek etc.
- Data - Exchange between CPU and Module.
- Status reporting - to CPU, since peripherals are slow.
- Address recognition for the devices connected to it.
4. Data Buffering : Essential function to overcome speed mismatch.
5. Error Detection : paper jam, bad data etc.
I/O Module Structure
I/O System Characteristics
Dependability is important
◦Particularly for storage devices
Performance measures
◦Latency (response time)
◦Throughput (bandwidth)
◦Desktops & embedded systems
-Mainly interested in response time & diversity of devices
◦Servers
-Mainly interested in throughput & expandability of devices
Interconnecting Components
-Need interconnections between CPU, memory, I/O controllers
-Bus: shared communication channel
>Parallel set of wires for data and synchronization of data transfer
>Can become a bottleneck
-Performance limited by physical factors that is wire length and number of connections
-More recent alternative: high-speed serial connections with switches (example : networks)
Bus types
Processor - Memory buses
- short, high speed
- design is matched to memory organization
I/O buses
- longer, allowing multiple connections
- specified by standards for interoperability
- connect to processor - memory bus through a bridge
There are three principal I/O techniques:
1. programmed I/O - I/O occurs under direct and continuous control of the program requesting the I/O operation
2. interrupt-driven I/O - a program issues an I/O command and then continues to execute, until it is interrupted by the I/O hardware to signal the end of the I/O operations
3. direct memory access (DMA) - specialized I/O processor takes over control of an I/O operation to move a large block of data.
Two important examples of external I/O interfaces are FireWire and Infiniband.
Programmed I/O
Overview of Programmed I/O
• Processor executes an I/O instruction by issuing command to appropriate I/O
module
• I/O module performs the requested action and then sets the appropriate bits in
the I/O status register – I/O module takes not further action to alert the
processor – it does not interrupt the processor
• The processor periodically checks the status of the I/O module until it
determines that the operation is complete
I/O Commands
The processor issues an address, specifying I/O module and device, and an I/O
command. The commands are:
• Control: activate a peripheral and tell it what to do
• Test: test various status conditions associated with an I/O module and its
peripherals
• Read: causes the I/O module to obtain an item of data from the peripheral and
place it into an internal register
• Write: causes the I/O module to take a unit of data from the data bus and
transmit it to the peripheral
Three Techniques for Input of a Block of Data
I/O Instructions
Processor views I/O operations in a similar manner as memory operations
Each device is given a unique identifier or address
Processor issues commands containing device address – I/O module must check
address lines to see if the command is for itself
I/O mapping
• Memory-mapped I/O
o Single address space for both memory and I/O devices
-disadvantage – uses up valuable memory address space
o I/O module registers treated as memory addresses
o Same machine instructions used to access both memory and I/O devices
-advantage – allows for more efficient programming
o Single read line and single write lines needed
o Commonly used
• Isolated I/O
o Separate address space for both memory and I/O devices
o Separate memory and I/O select lines needed
o Small number of I/O instructions
o Commonly used
Interrupt-Driven I/O
• Overcomes the processor having to wait long periods of time for I/O modules
• The processor does not have to repeatedly check the I/O module status
I/O module view point
• I/O module receives a READ command form the processor
• I/O module reads data from desired peripheral into data register
• I/O module interrupts the processor
• I/O module waits until data is requested by the processor
• I/O module places data on the data bus when requested
Processor view point
• The processor issues a READ command
• The processor performs some other useful work
• The processor checks for interrupts at the end of the instruction cycle
• The processor saves the current context when interrupted by the I/O module
• The processor read the data from the I/O module and stores it in memory
• The processor the restores the saved context and resumes execution
Direct Memory Access
Drawback of Programmed and Interrupt-Driven I/O
• I/O transfer rate limited to speed that processor can test and service devices
• Processor tied up managing I/O transfers
DMA Function
• DMA module on system bus used to mimic the processor.
• DMA module only uses system bus when processor does not need it.
• DMA module may temporarily force processor to suspend operations – cycle
stealing.
DMA Operation
• The processor issues a command to DMA module
o Read or write
o I/O device address using data lines
o Starting memory address using data lines – stored in address register
o Number of words to be transferred using data lines – stored in data
register
• The processor then continues with other work
• DMA module transfers the entire block of data – one word at a time – directly
to or from memory without going through the processor
• DMA module sends an interrupt to the processor when complete
DMA and Interrupt Breakpoints during Instruction Cycle
• The processor is suspended just before it needs to use the bus.
• The DMA module transfers one word and returns control to the processor.
• Since this is not an interrupt the processor does not have to save context.
• The processor executes more slowly, but this is still far more efficient that
either programmed or interrupt-driven I/O.
DMA Configurations
• Single bus – detached DMA module
• Each transfer uses bus twice – I/O to DMA, DMA to memory
• Processor suspended twice
• Single bus – integrated DMA module
• Module may support more than one device
• Each transfer uses bus once – DMA to memory
• Processor suspended once
• Separate I/O bus
• Bus supports all DMA enabled devices
• Each transfer uses bus once – DMA to memory
• Processor suspended once
